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general description the max4800a/max4802a provide high-voltage switch- ing on eight channels for ultrasonic imaging and printer applications. the devices utilize bcdmos process technology to provide eight high-voltage low-charge- injection spst switches, controlled by a 20mhz serial interface. data is clocked into an internal 8-bit shift reg- ister and retained by a programmable latch with enable and clear inputs. a power-on reset function ensures that all switches are open on power-up. the devices operate with a wide range of high-voltage supplies including: v pp /v nn = +100v/-100v, +185v/-15v, and +40v/-160v. the digital interface operates from a separate v dd supply from +2.7v to +6v. digital inputs din, clk, le , and clr are +6v tolerant, independent of the v dd supply voltage. the max4802a provides integrated 35k bleed resistors on each switch terminal to discharge capacitive loads. the devices are drop-in replacements for the supertex hv2203 and hv2303. they are available in the 48-pin lqfp, 26-bump csbga, and 28-pin plcc packages. all devices are specified for the commercial 0? to +70? temperature range. applications ultrasound imaging printers features ? fast spi? interface 20mhz ? pin-compatible replacement for supertex hv2203 (max4800a) ? pin-compatible replacement for supertex hv2303 (max4802a) ? flexible high-voltage supplies up to v pp - v nn = 200v ? low-charge-injection, low-capacitance 22 switches ? dc to 50mhz analog-signal frequency range ? -77db off-isolation at 5mhz ? low 10 a quiescent current ? integrated bleed resistors (max4802a only) ? available in standard plcc, lqfp, and csbga packages max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface ________________________________________________________________ maxim integrated products 1 19-4120; rev 1; 2/11 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information/ selector guide part bleed resistors second source pin- package max4800a cxz+* no 26 csbga MAX4800ACQI+ no hv2203pj-g 28 plcc max4800accm+* no hv2203fg-g 48 lqfp max4802a cxz+* yes 26 csbga max4802acqi+ yes hv2303pj-g 28 plcc max4802accm+* yes hv2303fg-g 48 lqfp note: all devices are specified over the commercial 0? to +70? temperature range. * future product?ontact factory for availability. + denotes a lead(pb)-free/rohs-compliant package. spi is a trademark of motorola, inc. clr le din n.c. v dd gnd n.c. (rgnd) n.c. v nn n.c. n.c. clk com4 n.c. no4 n.c. n.c. com3 n.c. com2 no3 n.c. n.c. com5 n.c. no1 n.c. n.c. v pp n.c. no0 com1 n.c. no2 n.c. + no5 n.c. no6 n.c. com6 n.c. no7 n.c. com7 dout n.c. n.c. max4800a max4802a com0 () max4802a only 1 2 34 56 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 37 38 39 40 41 42 43 44 45 46 47 48 24 23 22 21 20 19 18 17 16 15 14 13 lqfp (7mm x 7mm) top view pin/bump configurations pin/bump configurations continued at end of data sheet.
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages referenced to gnd.) v dd logic supply voltage........................................-0.3v to +7v v pp - v nn supply voltage ....................................................220v v pp positive supply voltage......................-0.3v to (v nn + 220v) v nn negative supply voltage ..............................+0.3v to -220v logic inputs le , clr, clk, din ..............................-0.3v to +7v dout..........................................................-0.3v to (v dd + 0.3v) rgnd (max4802a)...............................................-4.5v to +0.3v com_, no_.................................................................v nn to v pp continuous power dissipation (t a = +70?) 26-bump csbga (derate 11.8mw/? above +70?)..941mw 28-pin plcc (derate 10.5mw/? above +70?) .........842mw 48-pin lqfp (derate 22.7mw/? above +70?)........1818mw operating temperature range...............................0? to +70? storage temperature range .............................-65? to +150? junction temperature ......................................................+150? lead temperature (excluding csbga, soldering, 10s) ..+300? soldering temperature (reflow) 28 plcc.......................................................................+245? all other packages .......................................................+260? package thermal characteristics (note 1) 26 csbga junction-to-ambient thermal resistance ( j a )...........85?/w junction-to-case thermal resistance ( j c )................23?/w 28 plcc junction-to-ambient thermal resistance ( j a )...........44?/w junction-to-case thermal resistance ( j c )................10?/w 48 lqfp junction-to-ambient thermal resistance ( j a )...........44?/w junction-to-case thermal resistance ( j c )................10?/w electrical characteristics (v dd = +2.7v to +6v, v pp = +40v to (v nn + 200v), v nn = -40v to -160v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 2) parameter symbol conditions min typ max units analog switch analog-signal range v com_ , v no_ (note 3) v nn + 10 v pp - 10 v t a = 0c 30 t a = +25c 26 38 i com = 5ma t a = +70c 48 t a = 0c 25 t a = +25c 22 27 v pp = +40v, v nn = -160v, v com_ = 0v i com = 200ma t a = +70c 32 t a = 0c 25 t a = +25c 22 27 i com = 5ma t a = +70c 30 t a = 0c 18 t a = +25c 18 24 small-signal switch on-resistance r ons v pp = +100v, v nn = -100v, v com_ = 0v i com = 200ma t a = +70c 27 note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial .
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dd = +2.7v to +6v, v pp = +40v to (v nn + 200v), v nn = -40v to -160v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 2) parameter symbol conditions min typ max units t a = 0c 23 t a = +25c 20 25 i com = 5ma t a = +70c 30 t a = 0c 22 t a = +25c 16 25 small-signal switch on-resistance r ons v pp = +160v, v nn = -40v i com = 200ma t a = +70c 27 small-signal switch on-resistance matching r ons v pp = +100v, v nn = -100v, v com_ = 0v, i com = 5ma 5 20 % large-signal switch on-resistance r onl v com_ = v pp - 10v, i com = 1a 15 shunt resistance (max4802a only) r int no_ or com_ to rgnd, switch off 30 35 50 k 0 2 switch-off leakage i com_(off), i no_(off) v com_ , v no_ = v pp - 10v or unconnected; (max4800a only) 10 a switch-off dc offset r l = 100k (max4800a), no load (max4802a) 0 10 mv switch-on dc offset r l =100k (max4800a), no load (max4802a) 0 10 mv t a = 0c 3 t a = +25c 2 3 switch-output peak current (note 4) i com_ duty cycle 0.1% t a = +70c 2 a switch-output isolation diode current 300ns pulse width, 2% duty cycle (note 4) 300 ma switch dynamic characterisitics f = 5mhz, r l = 1k , c l = 15pf -30 -33 off-isolation (note 4) v iso f = 5mhz, r l = 50 -58 -77 db crosstalk v ct f = 5mhz, r l = 50 (note 4) -60 -80 db com_, no_ off-capacitance c com_(off), c no_ (off) v com_ = 0v, v no_ = 0v, f = 1mhz (note 4) 4 11 18 pf com_ on-capacitance c com_ (on) v com_ = 0v, f = 1mhz (note 4) 20 36 56 pf output voltage spike v spk r l = 50 (note 4) -150 +150 mv v pp = +40v, v nn = -160v, v com_ = 0v 820 v pp = +100v, v nn = -100v, v com_ = 0v 600 charge injection (max4802a only) q v pp = +160v, v nn = -40v, v com_ = 0v 350 pc logic lev el s logic-input low voltage v il 0.75 v logic-input high voltage v ih v dd - 0.75 v
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface 4 _______________________________________________________________________________________ electrical characteristics (continued) (v dd = +2.7v to +6v, v pp = +40v to (v nn + 200v), v nn = -40v to -160v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 2) parameter symbol conditions min typ max units logic input capacitance c in (note 4) 10 pf logic input leakage i in -1 +1 a dout low voltage v ol i sink = 1ma 0.4 v dout high voltage v oh i source = 0.75ma v dd - 0.5 v power supplies v dd supply voltage v dd 2.7 6.0 v v pp supply voltage v pp 40 v nn + 200 v v nn supply voltage v nn -160 -15 v v dd supply quiescent current i ddq v il = 0v, v ih = v psd , f clk = 0hz 3 a v dd supply dynamic current i dd v dd = +5v, v il = 0v, v ih = +5v, f clk = 5mhz 2 ma v pp supply quiescent current i ppq all switches remain on or off, i com_(on) = 5ma 10 50 a t a = 0c 6.5 t a = +25c 6.5 v pp = +40v, v nn = -160v t a = +70c 6.5 t a = 0c 4.0 t a = +25c 4.0 v pp = +100v, v nn = -100v t a = +70c 4.0 t a = 0c 4.0 t a = +25c 4.0 v pp supply dynamic current i pp 50khz output switching frequency with no load v pp = +160v, v nn = -40v t a = +70c 4.0 ma v nn supply quiescent current i nnq all switches remain on or off, i com_(on) = 5ma 10 50 a t a = 0c 6.5 t a = +25c 6.5 v pp = +40v, v nn = -160v t a = +70c 6.5 t a = 0c 4.0 t a = +25c 4.0 v pp = +100v, v nn = -100v t a = +70c 4.0 t a = 0c 4.0 t a = +25c 4.0 v nn supply dynamic current i nn 50khz output switching frequency with no load v pp = +160v, v nn = -40v t a = +70c 4.0 ma
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface _______________________________________________________________________________________ 5 timing characteristics (v dd = +2.7v to +6v, v pp = +40v to (v nn + 200v), v nn = -40v to -160v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 2) parameter symbol conditions min typ max units analog switch turn-on time t on v no_ = v pp - 10v, r l = 10k , v nn = -40v to -160v 5s turn-off time t off v no_ = v pp - 10v, r l = 10k , v nn = -40v to -160v 5s output switching frequency f sw duty cycle = 50% 50 khz maximum v com_ , v no_ slew rate dv/dt (note 4) 20 v/ns logic timing (figure 1) v dd = +5v ?0% 20 clk frequency f clk d ai sy chai ni ng v dd = +3v ?0% 10 mhz v dd = +5v ?0% 10 din to clk setup time t ds v dd = +3v ?0% 16 ns v dd = +5v ?0% 3 din to clk hold time t dh v dd = +3v ?0% 3 ns v dd = +5v ?0% 36 clk to le setup time t cs v dd = +3v ?0% 65 ns v dd = +5v ?0% 14 le low pulse width t wl v dd = +3v ?0% 22 ns v dd = +5v ?0% 20 clr high pulse width t wc v dd = +3v ?0% 40 ns v dd = +5v ?0% 50 clk rise and fall times (note 4) t r , t f v dd = +3v ?0% 50 ns v dd = +5v ?0%, c l 20pf 6 42 clk to dout delay t do v dd = +3v ?0%, c l 20pf 12 80 ns note 2: specifications at 0? are guaranteed by correlation and design. note 3: the analog-signal input v com_ and v no_ must satisfy v nn (v com_ , v no_ ) v pp , or remain unconnected during power-up and power-down. note 4: guaranteed by design and characterization; not production tested.
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface 6 _______________________________________________________________________________________ typical operating characteristics (v dd = +5v, v pp = +100v, v nn = -100v, t a = +25?, unless otherwise noted.) 0 0.01 10 1 0.1 i dd supply current vs. clock frequency 1.0 0.9 0.3 0.1 0.7 0.6 0.4 0.2 0.8 0.5 max4800a/2a toc01 clock frequency (mhz) i dd supply current (ma) din = 01010101 din = 00000000 off-isolation vs. frequency max4800a/2a toc02 frequency (mhz) off-isolation (db) -65 -70 -75 -80 -85 -90 -95 -100 -60 110 r s = r l = 50 0 10 5 20 15 25 30 03040 10 20 50 60 70 on-resistance vs. temperature max4800a/2a toc03 temperature ( c) on-resistance ( ) i sw = 5ma i sw = 200ma 0 5 10 15 20 25 30 35 40 +40/ -160 +60/ -140 +80/ -120 +100/ -100 +120/ -80 +140/ -60 +160/ -40 on-resistance vs. v pp /v nn supply voltage max4800a/2a toc04 v pp /v nn supply voltage (v) on-resistance ( ) t a = +70 c t a = 0 c t a = +25 c 0 40 20 100 80 60 160 140 120 180 02030 10 40 50 60 70 clk to dout delay vs. temperature max4800a/2a toc05 temperature ( c) t do (ns) v dd = +3v v dd = +5v 0 1.0 2.0 4.0 5.0 6.0 04050 20 30 10 60 70 80 90 100 supply current vs. switching frequency max4800a/2a toc06 switching frequency (khz) supply current (ma) i nn i pp i dd all switches operating all switches connected to gnd 3.0 0.20 0.25 0.35 0.30 0.40 0.45 supply current vs. v pp /v nn supply voltage max4800a/2a toc07 supply current (ma) one switch operating all switches connected to gnd f sw = 50khz i nn i pp +40/ -160 +60/ -140 +80/ -120 +100/ -100 +120/ -80 +140/ -60 +160/ -40 v pp /v nn supply voltage (v) 0 1.0 0.5 2.0 1.5 3.0 2.5 3.5 logic threshold vs. v dd supply voltage max4800a/2a toc08 v dd supply voltage (v) logic threshold (v) 23456 rising falling
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface _______________________________________________________________________________________ 7 pin/bump descriptions pin/bump max4800a lqfp max4800a csbga max4800a plcc name function 1 e4 26 com5 analog switch 5common terminal 2, 4, 6, 7, 9, 11, 13, 15, 17, 19, 21, 23, 26, 27, 30, 31, 32, 38, 40, 42, 44, 46, 48 d6 9, 11, 15 n.c. no connection. not connected internally. 3 e1 27 com4 analog switch 4common terminal 5 e3 28 no4 analog switch 4normally open terminal 8 d1 1 com3 analog switch 3common terminal 10 d3 2 no3 analog switch 3normally open terminal 12 d4 3 com2 analog switch 2common terminal 14 c3 4 no2 analog switch 2normally open terminal 16 c4 5 com1 analog switch 1common terminal 18 a4 6 no1 analog switch 1normally open terminal 20 c5 7 com0 analog switch 0common terminal 22 d5 8 no0 analog switch 0normally open terminal 24 c6 10 v pp positive high-voltage supply. bypass v pp to gnd with a 0.1f or greater ceramic capacitor. 25 c7 12 v nn negative high-voltage supply. bypass v nn to gnd with a 0.1f or greater ceramic capacitor. 28 d7 13 gnd ground 29 d9 14 v dd digital supply voltage. bypass v dd to gnd with a 0.1f or greater ceramic capacitor. 33 e9 16 din serial-data input 34 e7 17 clk serial-clock input 35 e6 18 le latch-enable input, active low 36 f7 19 clr latch clear input 37 f6 20 dout serial-data output 39 e5 21 com7 analog switch 7common terminal 41 f5 22 no7 analog switch 7normally open terminal 43 f4 23 com6 analog switch 6common terminal 45 h4 24 no6 analog switch 6normally open terminal 47 f3 25 no5 analog switch 5normally open terminal
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface 8 _______________________________________________________________________________________ pin/bump descriptions (continued) pin/bump max4802a lqfp max4802a csbga max4802a plcc name function 1 e4 26 com5 analog switch 5common terminal 2, 4, 6, 7, 9, 11,13, 15, 17, 19, 21, 23, 26, 30, 31, 32, 38, 40, 42, 44, 46, 48 9, 15 n.c. no connection. not connected internally. 3 e1 27 com4 analog switch 4common terminal 5 e3 28 no4 analog switch 4normally open terminal 8 d1 1 com3 analog switch 3common terminal 10 d3 2 no3 analog switch 3normally open terminal 12 d4 3 com2 analog switch 2common terminal 14 c3 4 no2 analog switch 2normally open terminal 16 c4 5 com1 analog switch 1common terminal 18 a4 6 no1 analog switch 1normally open terminal 20 c5 7 com0 analog switch 0common terminal 22 d5 8 no0 analog switch 0normally open terminal 24 c6 10 v pp positive high-voltage supply. bypass v pp to gnd with a 0.1f or greater ceramic capacitor. 25 c7 12 v nn negative high-voltage supply. bypass v nn to gnd with a 0.1f or greater ceramic capacitor. 27 d6 11 rgnd bleed resistor ground 28 d7 13 gnd ground 29 d9 14 v dd digital supply voltage. bypass v dd to gnd with a 0.1f or greater ceramic capacitor. 33 e9 16 din serial-data input 34 e7 17 clk serial-clock input 35 e6 18 le latch-enable input, active low 36 f7 19 clr latch clear input 37 f6 20 dout serial-data output 39 e5 21 com7 analog switch 7common terminal 41 f5 22 no7 analog switch 7normally open terminal 43 f4 23 com6 analog switch 6common terminal 45 h4 24 no6 analog switch 6normally open terminal 47 f3 25 no5 analog switch 5normally open terminal
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface _______________________________________________________________________________________ 9 detailed description the max4800a/max4802a provide high-voltage switching on eight channels for ultrasound imaging and printer applications. the devices utilize bcdmos process technology to provide eight high-voltage low- charge-injection spst switches, controlled by a 20mhz serial interface. data is clocked into an internal 8-bit shift register and retained by a programmable latch with enable and clear inputs. a power-on reset function ensures that all switches are open on power-up. the devices operate with a wide range of high-voltage supplies including: v pp /v nn = +100v/-100v, +185v/-15v, or +40v/-160v. the digital interface oper- ates from a separate v dd supply from +2.7v to +6v. digital inputs din, clk, le , and clr are +6v tolerant, independent of the v dd supply voltage. the max4802a provides integrated 35k bleed resistors on each switch terminal to discharge capacitive loads. the devices are drop-in replacements for the supertex hv2203 and hv2303, respectively. analog switch the devices allow a peak-to-peak analog-signal range from v nn + 10v to v pp - 10v. analog switch inputs must be unconnected, or satisfy v nn (v com_ , v no_ ) v pp during power-up and power-down. high-voltage supplies the devices allow a wide range of high-voltage sup- plies. the devices operate with v nn from -160v to -15v and v pp from +40v to (v nn + 200v). when v nn is connected to gnd (single-supply applica- tions), the devices operate with v pp up to +200v. 50% 50% t wc 90% t on din le clk dout switch *for slower clk rates refer to the max4800/max4801/max4802 data sheet. clr off on 10% t off t do t dh t ds 50% 50% 50% 50% 50% 50% d n d n-1 d n+1 t wl t cs figure 1. serial interface timing*
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface 10 ______________________________________________________________________________________ the v pp and v nn high-voltage supplies are not required to be symmetrical, but the voltage difference v pp - v nn must not exceed 200v. bleed resistors (max4802a) the max4802a features integrated 35k bleed resis- tors to discharge capacitive loads such as piezoelec- tric transducers. each analog-switch terminal is connected to rgnd with a bleed resistor. serial interface the devices are controlled by a serial interface with an 8-bit serial shift register and transparent latch. each of the eight data bits controls a single analog switch (see table 1). data on din is clocked with the most signifi- cant bit (msb) first into the shift register on the rising edge of clk. data is clocked out of the shift register onto dout on the rising edge of clk. dout reflects the status of din, delayed by eight clock cycles (see figures 1 and 2). latch enable ( le ) drive le logic-low to change the contents of the latch and update the state of the high-voltage switches (figure 2). drive le logic-high to freeze the contents of the latch and prevent changes to the switch states. to reduce noise due to clock feedthrough, drive le logic- high while data is clocked into the shift register. after the data shift register is loaded with valid data, pulse le logic-low to load the contents of the shift register into the latch. latch clear (clr) the devices feature a latch clear input. drive clr logic-high to reset the contents of the latch to zero and open all switches. clr does not affect the contents of the data shift register. pulse le logic-low to reload the contents of the shift register into the latch. power-on reset the devices feature a power-on reset circuit to ensure all switches are open at power-on. the internal 8-bit ser- ial shift register and latch are set to zero on power-up. le clk dout data from previous data byte power-up default: d7?0 = 0 d7 d6 d5 d4 d3 d2 d1 d0 d7 din d7 d6 d5 d4 d3 d2 d1 d0 msb lsb figure 2. latch-enable interface timing
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface ______________________________________________________________________________________ 11 applications information logic levels the devices?digital interface inputs clk, din, le , and clr are tolerant of up to +6v, independent of the v dd supply voltage, allowing compatibility with higher volt- age controllers. daisy chaining multiple devices digital output dout is provided to allow the connection of multiple devices by daisy-chaining (figure 3). connect each dout to the din of the subsequent device in the chain. connect clk, le , and clr inputs of all devices, and drive le logic-low to update all devices simultaneously. drive clr high to open all the switches simultaneously. additional shift registers may be included anywhere in series with the max4800a/ max4802a data chain. supply sequencing and bypassing the devices do not require special sequencing of the v dd , v pp , and v nn supply voltages; however, analog switch inputs must be unconnected, or satisfy v nn (v com_ , v no_ ) v pp during power-up and power- down. bypass v dd , v nn , and v pp to gnd with a 0.1? ceramic capacitor as close to the device as possible. chip information process: bcdmos table 1. serial interface programming x = don? care. data bits control bits function d0 (lsb) d1 d2 d3 d4 d5 d6 d7 (msb) le clr sw0 sw1 sw2 sw3 sw4 sw5 sw6 sw7 llloff hllon llloff hllon llloff hllon llloff hllon lll off hll on lll off hll on lll off hll on ll l off hl l on x x x x x x x x h l hold previous state x x x x x x x x x h off off off off off off off off
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface 12 ______________________________________________________________________________________ max4800a le le clk clk clr max4800a max4800a le clk din le clk din din din clr clr clr dout dout dout u1n u11 u10 figure 3. interfacing multiple devices by daisy-chaining shift register level shifter level shifter din clk dout clr v nn v pp gnd com0 no0 com7 no7 le latch v dd max4800a functional diagrams
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface ______________________________________________________________________________________ 13 shift register level shifter level shifter din clk dout clr v nn v pp gnd com0 no0 com7 no7 latch v dd max4802a rgnd le functional diagrams (continued) 12 13 14 15 16 17 18 1 2 3 426 27 28 19 20 21 22 23 24 25 5 6 7 8 9 10 11 no5 no6 com6 no7 com7 dout clr v nn gnd v dd n.c. din clk le com1 no1 com0 no0 n.c. v pp n.c. (rgnd) no2 com2 no3 com3 no4 com4 com5 max4800a max4802a () max4802a only plcc top view + pin/bump configurations (continued)
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface 14 ______________________________________________________________________________________ a b c d e f g h 1 23456789 d1 e1 e7 f7 c7 d7 a4 h4 e9 d9 e6 f6 c6 d6 e5 f5 c5 d5 e4 f4 c4 d4 e3 f3 c3 d3 com0 com1 com2 com3 com4 com5 com6 com7 no0 no1 no2 no3 no4 no5 no6 no7 din clk le clr dout gnd n.c. (rgnd) v dd v pp v nn csbga max4800a max4802a () max4802a only top view + pin/bump configurations (continued) package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing per tains to the package regardless of rohs status. package type package code outline no. land pattern no. 26 csbga x07265+1 21-0158 90-0184 28 plcc q28+13 21-0049 90-0235 48 lqfp c48+6 21-0054 90-0093
max4800a/max4802a low-charge-injection, 8-channel, high-voltage analog switches with 20mhz serial interface maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 15 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 5/08 initial release 1 2/11 changed the dc analog-signal frequency range to 50mhz in the features section; changed the tqfp package to lqfp in the general description , ordering information , features , pin/bump configurations , pin/bump descriptions , and package information 1, 8, 14

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